Intel acquires eASIC

Intel Corp. today said it’s buying a fabless chipmaker called eASIC Corp., which builds programmable computer chips that can be customized during the production process.

Financial terms of the deal were not disclosed, though Intel said the price was “not material.” The deal will see about 120 of eASIC’s employees join Intel’s programmable solutions group, which was created following its $16.7 billion acquisition of Altera Corp in 2015.

eASIC’s chips are properly known as “structured ASICs,” which are a kind of halfway house between full-blown field programmable gate arrays and application-specific integrated circuits. FPGAs, often referred to as “hardware accelerators,” are integrated circuits that can be reprogrammed at any time to customize them for specific computing tasks. ASICs are chips tailored for a specific application that cannot be reprogrammed after manufacture.

FPGAs and ASICs have become increasingly popular in recent years driven by what Dan McNamara (pictured, left, with eASIC Chief Executive Ronnie Vasishta), corporate vice president and general manager of the programmable solutions division at Intel, called an “explosion of data and the need to process, analyze, store and share it.”

FPGAs are most widely deployed in data center applications thanks to their versatility and high performance. They’re made up of a mixture of logic, memory and digital signal processing blocks that serve to implement any desired function, with extremely high throughput and low latency.

These characteristics made them ideal for cloud and edge applications, but the tradeoff is that FPGAs are also more expensive. So once a new application has established itself and doesn’t change as much, it becomes more appropriate to run that application on something less flexible and more cost-efficient than a FPGA.

Normally this would mean moving the application to an ASIC chip, but eASIC’s structured ASICs’ provides another option. If a customer has already found its favored way to set up Intel’s FPGAs, that program can be frozen onto the structured ASIC chip in the factory, giving it something closer to the benefits of a fully customized chip in a much faster time frame than with regular ASICs.

“Structured ASICs are easier to design, which removes the time to market penalty associated with traditional ASICs,” Patrick Moorhead, president and principal analyst at Moor Insights & Strategies, told SiliconANGLE.

Reuters reported that Intel might be planning to offer structured ASICs as a kind of transition to customers that are already using FPGAs and looking to migrate to something cheaper. Potential applications could be baseband heads in 4G and 5G networks or data-intensive cloud applications such as artificial intelligence services.

“Instead of getting programmed in the field, it gets programmed in the factory,” McNamara told Reuters. “It still costs hundreds of thousands of dollars, but you get it done in four months as opposed to two years.”

The acquisition comes at a time when Intel has been aggressively pushing to extend its leadership beyond its traditional central processing units into more specialized areas. These include chips that handle functions such as memory and vision processing as well as FPGAs and ASICs.

“This acquisition reinforces that Intel is no longer just about CPUs,” Moorhead said. “It made a massive investment in FPGAs with Altera, it acquired Movidius and Nervana, and is creating a discrete graphics processing unit. I expect Intel to make more ASIC acquisitions and packaging acquisitions so it can assemble systems on a chip with different kinds and sizes of compute, whether it be CPU, GPU, FPGA or ASIC.”

Intel said it hopes to complete the eASIC acquisition by the third quarter.